Threshold voltage instabilities of present SiC-power MOSFETs under positive bias temperature stress
نویسندگان
چکیده
We study the threshold voltage (Vth) instability of commercially available silicon carbide (SiC) power MOSFETs or prototypes from four different manufacturers under positive bias temperature stress (PBTS). A positive bias near Vth causes a threshold voltage shift of 0.7 mV per decade in time per nanometer oxide thickness in the temperature range between -50°C and 150°C. Recovery at +5 V after a 100 s +25 V gate-pulse causes a recovery between -1.5 mV/dec/nm and 1.0 mV/dec/nm at room temperature and decreases with temperature. All devices show similar stress, recovery and temperature dependent behavior indicating that the observed Vth instabilities are likely a fundamental physical property of the SiC/SiO2 system caused by electron trapping in near interface traps. It is important to note that the trapping does not cause permanent damage to the interface like hydrogen bond breakage in silicon based devices and is nearly fully reversible via a negative gate bias.
منابع مشابه
Characterization of Transient Gate Oxide Trapping in SiC MOSFETs Using Fast I–V Techniques
Threshold voltage and drain current instabilities in state-of-the-art 4H-SiC MOSFETs with thermal as-grown SiO2 and NO-annealed gate oxides have been studied using fast I–V measurements. These measurements reveal the full extent of the instability underestimated by dc measurements. Furthermore, fast measurements allow the separation of negative and positive bias stress effects. Postoxidation an...
متن کاملEfficient Characterization of Threshold Voltage Instabilities in SiC nMOSFETs Using the Concept of Capture-Emission-Time Maps
We utilize the recently suggested capture-emission-time (CET) maps [1] for the first time for SiC technologies. CET maps are a very powerful characterization technique which allow the elegant and comprehensive analysis of oxide/interface traps at or near the semiconductor-dielectric interface and were originally developed to characterize degradation of Si based MOSFETs. For asprocessed SiC MOSF...
متن کاملImpact of hot carrier degradation and positive bias temperature stress on lateral 4H-SiC nMOSFETs
We study the impact of positive bias temperature stress (PBTS) and hot carrier stress (HCS) on lateral 4H-SiC nMOSFETs. These degradation mechanisms are prominent in silicon (Si) based devices where both create oxide (OT) as well as interface traps (IT) [1, 2]. For SiC MOSFETs only limited information regarding these mechanisms is available [3–5]. We transfer the charge pumping (CP) technique, ...
متن کاملAnalysis of Voltage Variation in Silicon Carbide MOSFETs during Turn-On and Turn-Off
Due to our limited knowledge about silicon carbide metal–oxide–semiconductor fieldeffect transistors (SiC MOSFETs), the theoretical analysis and change regularity in terms of the effects of temperature on their switching characteristics have not been fully characterized and understood. An analysis of variation in voltage (dVDS/dt) for SiC MOSFET during turn-on and turn-off has been performed th...
متن کامل